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Cortex-A9: disable SIMD, Neon & VFP in the secure world

Vincent Siles

Hi ! I'm trying to configure my secure monitor so that:

- the secure world does not have access to any floating-point hardware

- the normal world can do whatever it wants

 

To this purpose, I allow the normal world to use the relevant registers by configuring CPACR and NSACR.

In order to prevent the Secure world to use the relevant registers & operation, I want to:

- when switching from NS -> S: save the value of FPEXC, and set FPEXC[EN] to 0

- when switchting from S -> NS: restoring the value of FPEXC

 

Will this be enough to prevent any fp operation in the Secure world, while allowing a normal usage in the NW ?

 

Best,

V.

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    Hi,

    You are spot on. Setting FPEXC.EN==0 in the secure monitor will cause any VFP or SIMD instructions to undef until you re-enable it.

    Note that as monitor mode and the other secure PL1 modes share the same level of privilege there is no way to stop a secure kernel re-enabling VFP but the nature of the trust model means you have to trust the kernel to play nicely.

    On a v8-A platform the monitor runs at a higher level of privilege than the trusted kernel (EL3 vs S-EL1) and there are trap registers that can stop secure EL1 re-enabling FP.

    Pete.
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  • 0
    Hi,

    You are spot on. Setting FPEXC.EN==0 in the secure monitor will cause any VFP or SIMD instructions to undef until you re-enable it.

    Note that as monitor mode and the other secure PL1 modes share the same level of privilege there is no way to stop a secure kernel re-enabling VFP but the nature of the trust model means you have to trust the kernel to play nicely.

    On a v8-A platform the monitor runs at a higher level of privilege than the trusted kernel (EL3 vs S-EL1) and there are trap registers that can stop secure EL1 re-enabling FP.

    Pete.
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