How to modify the value of AWCACHE [3:0] and ARCACHE[3:0] in AXI?

Hi zynq,

The ARCACHE and AWCACHE signals are driven by the AXI master, so it will depend on that master design how these outputs are driven.

If the AXI master contains an MMU or MPU where memory regions and their characteristics are defined, it will be down to how you configure that MPU/MMU that decides the appropriate AxCACHE values driven for each address range. So you should then refer to the AXI master's documentation to understand how to control these outputs.

However more basic AXI masters might not care how AxCACHE is driven, and so they would be tied off to static values, with 0x0 or 0x1 indicating basic "Device" type accesses according to the AXI protocol, meaning the transfers should always reach the destination device (not held in a cache). So a safe default value.

But as you are asking specifically about a "linux driver", what is the Linux driver driving ?

Unless the driver is just driving a simple AXI master where you have defined ways of specifying all outputs (i.e. you would need to check the driver's documentation), one of the above scenarios will probably answer your question (you need to configure an MPU/MMU using the driver, or you cannot control AxCACHE using the driver because these outputs are tied off in the master implementation).

Hope that maybe helps you find an answer.

JD

Hi zynq,

The ARCACHE and AWCACHE signals are driven by the AXI master, so it will depend on that master design how these outputs are driven.

If the AXI master contains an MMU or MPU where memory regions and their characteristics are defined, it will be down to how you configure that MPU/MMU that decides the appropriate AxCACHE values driven for each address range. So you should then refer to the AXI master's documentation to understand how to control these outputs.

However more basic AXI masters might not care how AxCACHE is driven, and so they would be tied off to static values, with 0x0 or 0x1 indicating basic "Device" type accesses according to the AXI protocol, meaning the transfers should always reach the destination device (not held in a cache). So a safe default value.

But as you are asking specifically about a "linux driver", what is the Linux driver driving ?

Unless the driver is just driving a simple AXI master where you have defined ways of specifying all outputs (i.e. you would need to check the driver's documentation), one of the above scenarios will probably answer your question (you need to configure an MPU/MMU using the driver, or you cannot control AxCACHE using the driver because these outputs are tied off in the master implementation).

Hope that maybe helps you find an answer.

JD

To add to the JD's comment.

For most Cortex processors, when the MMU/MPU is enabled the values of AxCACHE are derived from the type setting (Normal/Device) and for Normal regions the outer cacheability attribute.  For example, on the Cortex-A53:

ARM Cortex-A53 MPCore Processor Technical Reference Manual: 7.5. Additional memory attributes