Dear sirs,
I'm studying ARM v8a architecture recently. I found that almost each A64 data processing instruction has a 32-bit variant using sf to encode it. My question is as follows.
1. who is responsible for using this variant, hardware designer or software designer or only compiler designer?
2. when do we to use this variant, in processor design stage or software development stage?
3. Do all ARM 64bit processors support this variant?
4. How do we to choose this variant?
THanks.
Hi,
Thanks for your question.
Yes, most data processing instructions are capable of 32-bit or 64-bit operation. All cores which support the 64-bit execution state must support all the instructions defined by the architecture, so all will support both variants. The choice of which to encode is simply driven by the size of the operation required. The compiler will choose the variant based on the size of the data types involved. The assembler will choose it based on the size of the register operands. For example:
ADD w0, w1, w2 ; this is a 32-bit operation (w0 etc are 32-bit registers) and will be encoded accordingly
ADD x0, x1, x2; this is a 64-bit operation (x0 etc are 64-bit registers) and will be encoded accordingly
Hope this helps.
Chris
Dear Chris,
Thanks for your quick response. It is great helpful for me.
Cray