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TZASC (TZC380) enabling sequence

Hi everyone, I am trying to correctly setup the TZASC of my IMX6q and IMX6ul boards, without blowing the fuse (I only have one board, I'd like to have it right by software before).

From what I gathered from the documentation of the TZASC and from the documentation of the board, I have to:

- enable the clocks of the TZASC (for the moment, I set all the CCGRX to 0xffffffff)

- correctly setup at least TZASC's region 0 (for the moment, Secure and Non secure have read/right access)

- setup the action to be notified of potential violations (IRQ and Exception in my case)

- Disable the bypass (by setting GPR9's bit 0 to 1 on my boards).

At this point, I still get a few 'printf's from the uart, but my kernel hangs. Did I miss something ?

Be aware that I do this from the RAM I'm trying to protect. I did a few tests by moving this code to OCRAM prior to starting my OS and the result was more or less the same, hanging.

From the documentation of the TZASC, I gathered that doing this setup from the RAM you want to protect is not the best idea, but it should work either way, with a small period of time where TZASC rights might not be enforced correctly.

In my case, I go from "By-passed" to "Not by-passed and RW for everyone" so I didn't except troubles. IMX6q's documentation seems to be more aggressive and note that this enabling *has to* be performed while the RAM is IDLE.

Does anyone can clarify the situation I am in ?

Best regards,

Vincent