Is there an intrinsic limit to the width of the bit banding for peripherals for the
Cortex M3?
EFM32 Giant Gecko seems to have a limit of eight bits - bits 8 to 31 does not seem to work.
Is this normal?
If it should work, then the Giant Gecko is broken - you can only set and clear and readbits 0 to 7 in a peripheral register by means of giving them bit band alias names.
If you assign a name to the bit alias of any of bits 8 to 31, you can neither use it to assign a valueto the relevant bit, nor can you read it.
This is also true when using a C language pointer to access the bit aliases - aliases of bits 0 to 7 perform as expected, while aliases of bits 8 to 31 in a peripheral register do not work.
The ram bit banding works for the full 32 bits, though.
From: jyiu <community@arm.com>
To: H van Rooyen <shapeshifter_100@yahoo.com>
Sent: Tuesday, March 1, 2016 3:58 PM
Subject: Re: - Cortex M3 peripheral Bit Banding limit?
Cortex M3 peripheral Bit Banding limit?
reply from Joseph Yiu in ARM Processors - View the full discussionThere shouldn't be any restriction (It should work for bit 8 to bit 31).regards,Joseph
Reply to this message by replying to this email, or go to the message on ARM Connected Community
Start a new discussion in ARM Processors by email or at ARM Connected Community
Following Cortex M3 peripheral Bit Banding limit? in these streams: Inbox
Not interested in these emails anymore, or want to change how often they come? Update your email preferences. You will need to login to access your user preferences.