Hi,
I'm currently an probetion for an electronics system development company and they gave me LPC1788 and Topway LMT057DCDFWU-NBA to work with. I don`t have mentor or any kind of help. I don`t have any example.
I'm also very new to programming therefore it is rather hard for me to work with the device. If someone could give me some kind of help, or some initalization code for LPC 1788 lcd controller, or some example ?
Any advice is welcomed.
Thank you very much.
First things you need are three PDF-files, download them and save them on your harddisk in a place where you can find them again:
Before I continue, please let me know a little more on the following ...
Yes, I am familiar with C programing. I have read those files. TFT is wired with LPC (they do that). And i know something about those signals, but not everything.
And now i must initialize that display. What is next?
Thanks for the help.
Setting up the LCD/TFT controller on the LPC1788.
I'm not going into deep details in this reply; if you get stuck, just ask, and I'll help you get past the problems.
(Note: If you have any external SRAM or SDRAM connected, this external RAM should be initialized before the LCD controller is initialized).
Open UM10470 and go to chapter 11 (around page 283).
One of the most efficient ways to make sure it's set up correctly, is to go through all the hardware registers and load them with the correct values. -However, it's not enough to just set up the hardware registers; you will also need to set the GPIO pins up, so they use "Alternate Functions".
Follow "Basic configuration"; it will guide you in configuring the LCD controller.
The first step is to enable power by setting the PCLCD bit in the PCONP register. This is necessary, before you can complete any of the next steps.
The second step is to set up the LCD clock.
If you do not have an external clock source dedicated to the LCD display, then it's easiest if you set up the LCD clock to be derived from the CPU clock (CCLK).
To do that, you can make CCLK a multiple of 25.175 MHz (for instance 100.7 MHz), but most TFT displays will allow you to have a lower PCLK, so if you're running the CPU at 120 MHz, a 24 MHz PCLK should work quite well.
A 24 MHz PCLK would give you a 57.14 Hz vertical update frequency.
The third step is to configure the GPIO pins to be controlled by the LCD controller. If this is not done, the LCD controller cannot send the right signals on the pins connected to the TFT display.
The fourth step can be skipped for now.
The fifth step is to configure the CLKDIV. Let's imagine you're running the CPU at 120 MHz, then CLKDIV should be set to (120 / 24) - 1 = 4.
You'll also need to set the polarity of the HSYNC and VSYNC signals.
-But there's still something missing; we did not tell the LCD controller about the timings we've found in the datashet.
Go to section 11.7 (page 306); here you will see an overview of all the registers.
If you go through each of those hardware registers and fill in the timings you've collected from the datasheet, you're almost done.
Almost, because you also need to supply a desired pixel format and a RAM address that should be used as "frame buffer".
I don't remember whether it's the upper panel or the lower panel address that needs to be configured, you could either experiment or just load the same address into both LCDUPBASE and LCDLPBASE.
These addresses are pointers to your frame buffer in RAM.
When all the registers are set up as you wish, configure the CTRL register.
Here you can choose 24 bpp if you wish to have all the 262143 colours available; otherwise you could choose RGB565 for a 16 bits per pixel or 8 bpp if you want to use "indexed colours" (eg. a colour palette).
Remember to set the LCDTFT bit in this register as well. Do not set the 'dual-panel' bit.
Finally set the LCDEN bit; this should result in some messy pixel-soup being displayed on your screen.
Great, we can skip a lot of basics then.
The most important is that you will need to find out the timings. Those are in the datasheets for the display.
First of all, the pixels are output at a clock frequency called the "Pixel Clock" (also known as PCLK).
All my horizontal timings are based on PCLKs, which also means they're based on number of pixels.
All my vertical timings are based on horizontal line counts.
The Horizontal and Vertical timings have these types in common:
Sync Pulse, followed by Back Porch, followed by Active Video, followed by Front Porch.
Active Video is the number of visible pixels on the display.
Front Porch and Back Porch are delays between the Active Video and the Sync Pulse.
You need to find the values for those timings in the datasheet. Here's what we're looking for:
On page 3 in the datasheet for the TFT display, you will find the first clue under "Number of dots"; this gives you the number of visible pixels (HAV and VAV).
Further down on page 3, you also find another interesting detail under "Input Interface, R:G:B=x:y:z", that's the number of bits per component; these are needed later.
Under AC Characteristics you will find PCLK (CLK frequency/FCPH), HSYNC Pulse Width (that's HS pulse width in pixels), VSYNC Pulse Width (that's VS pulse width in lines). We also get the HS period, which is Horizontal Frame Length and VS period, which is Vertical Frame Length.
Pay attention to the note saying "When SYNC mode is used ..." This gives us the HBP timing in pixels, because it's the time between the sync pulse and the active video.
If we look in the table again, we can see that 144 is mentioned under HS-DEN, which means it must mean the timing betwen HS and DEN.
Thus we also get VS-DEN, which would be VBP.
Figure 6-1-2 and Figure 6-1-3 reveals the polarity of the HSYNC and VSYNC signals (HPOL and VPOL); they're active low.
Now we have PCLK, VSP, VBP, VAV, VFL, HSP, HBP, HAV and HFL.
We still need to find VFP and HFP.
Since we have HSP, HBP, HAV and HFL, we can calculate HFP, as HFL=(HSP+HBP+HAV+HFP):
HFP = HFL - (HSP + HBP + HAV)
The same applies to the Vertical Front Porch:
VFP = VFL - (VSP + VBP + VAV)
So now I believe we've got all the timing informations we need.
The next step is to go to the LPC178x/7x User's Manual and find out how to set up the TFT controller.
I will continue in the next reply...
Hello,
Thank you for the help. But I am a little bit stuck. I have problem with HFP. How to configure Hsync and Vsync and DEN?
It turns out that I do not have pins on the conector (for display) for LRC, DRC, DEN, HSYNC, VSYNC. But I have general purpose pins (on the conector); P1(24,25,28,29) and P2(8,9). Can i use dose pins, and how?
If we look in UM10470, section 11.5.0, we'll find more info about the available signals and their names.
Table 203 is important to us.
LCD_ENAB_M would be the same s LCD_DEN ("TFT data enable output").
LCD_FP would be the same as LCD_VSYNC
LCD_LP would be the same as LCD_HSYNC
In UM10470, table 248 (page 334), we'll find additional information on the LCD pins available.
LCD_FP is available on P2[3]
LCD:ENAB_M is available on P2[4]
LCD_LP is available on P2[5]
Now let's turn to table 82 (page 128)
Here we'll find P2[3], P2[4] and P2[5] and the values that go into the IOCON register for those pins, when configured for LCD_FP, LCD_ENAB_M and LCD_LP (that's value 111, which is alternate function 7)
Let's try checking if those signals are connected to the TFT display.
For instance, let's take the LCD's HSYNC pin.
In section 3.1 of the datasheet for the TFT display, we'll find the pin connections.
If you have a printout of this page, you could use the 'Note' column for writing the pin that this signal is connected to on the LPC1788.
Pin 3 is the HSYNC signal. Follow this signal to the pin on the LPC1788 (or use a multimeter to beep-check the connection).
If it ends up on P2[5], then you're in luck; write 'P2[5] in the 'Note' column.
(unfortunately, the 'Note' column does not have any rows for for R[1..4], G[1..4], B[1...4], but the blank lines might work for this purpose).
The LRC and UDC signals can be either permanently pulled up or down or connected to any GPIO pin of your own choice.
If it's already connected, the existing connection should do fine; just configure the GPIO pin as output and set it to the desired value. It wouldn't need to change value frequently; just when initializing the display.
If you need to find the connections of the R[5...0], G[5...0] and B[5...0] signals (they each have more than one possible port connection on the LPC1788), then use the following tables to assist you:
Table 82 (page 128)
Table 248 (page 334) (this is a suggested layout only)
R[5..0] will go to LCD_VD[7..2], G[5..0] will go to LCD_VD[15..10], B[5..0] will go to LCD_VD[23..18] and now I need some tea.