I'm measuring worst case execution time of an application. I would like to flush L1, L2 (Instruction and Data) cache and then begin my measurements.
Is it doable from user mode?
Processor: ARM Cortex A9
OS: Linaro Linux
For the L1 caches, no. The ARMv7-A/R Architecture Reference Manual says:
B4.2.1 Cache and branch predictor maintenance operations, VMSA This section describes the cache and branch predictor maintenance operations. These are: • 32-bit write-only operations • can be executed only by software executing at PL1 or higher.
B4.2.1 Cache and branch predictor maintenance operations, VMSA
This section describes the cache and branch predictor maintenance operations. These are:
• 32-bit write-only operations
• can be executed only by software executing at PL1 or higher.
There might be a system call to request the OS does it for you.
The Cortex-A9 does not have a built-in L2 cache, but it is often paired with a L2C-310. The controls of the L2C-310 are memory mapped, so strictly speaking it's a question of whether they are mapped to an address you have access to. In practise it is very unlikely that the L2 cache's controls would be mapped into user space.