Hi all,
I'm trying to boot Linux on my hypervisor like environment.
In booting process, unexpected hyper trap was occurred and became hyp mode.
In hyp mode, the Hyp Syndrome Register (HSR) value is 0x93830006.
According to the manual, this meant "Fault not on a stage 2 translation for a stage 1 translation table walk" (EC is 0x24 and ISS[7] is 0).
I checked the page table, but it seems no problem.
Why is this hyp exception occured?
Thanks,
Takumi
The value of these registers are as follows:
ttbcr: 0x8f010f00
ttbr0: 0x80003000
ttbr1: 0x80003010
TTBR0's tables and TTBR1's tables are the same. It doesn't seem to be problem.
I'm sorry for my late reply.
That's true, it should work per B3.6.4 of the ARM ARM, given the base addresses..
What do your MAIR0&1 registers look like?
I also checked your registers again and it looks like you have HCR.DC==1 when you reported HCR again. Are you sure this is what you want? It implies that the SCTLR.M is never enabled otherwise all the MAIR indices in the descriptors in Linux will be ignored.. if you're mapping a device into that region and it gets a cacheable transaction (i.e. a linefill or eviction) it may respond extremely poorly.. it is also not a good idea to do table walks to Device memory. You could very easily test this concept -- set HCR.PTW=1.
I have to admit we're grabbing at straws here. To work out what's going on you need to have the full data set, some insight on what "hypervisor-like" means (i.e. your code).. this is not the place for that.
Ta,
Matt
Hi Matt,
Your suspicion is right. I assumed that when SCTLR.M is enabled, HCR.DC is ignored.
I cleared HCR.DC, this fault is removed.
Thank you for your kind help.