Is microSCU required for multi-cores to maintain coherency?

Note, the ACP (and micro-SCU) are there to give coherency with external accelerators, not to maintain coherency between the Cortex-R5 cores.  From the TRM:

A twin-CPU Cortex-R5 group is not an MP-cluster. No hardware coherency is provided between the two CPUs, see CPU configurations for more information. The Cortex-R5 processor does provide hardware coherency with an external master in limited situations using the ACP. See Accelerator Coherency Port interface for more information.

developer.arm.com/.../Coherency

Note, the ACP (and micro-SCU) are there to give coherency with external accelerators, not to maintain coherency between the Cortex-R5 cores.  From the TRM:

A twin-CPU Cortex-R5 group is not an MP-cluster. No hardware coherency is provided between the two CPUs, see CPU configurations for more information. The Cortex-R5 processor does provide hardware coherency with an external master in limited situations using the ACP. See Accelerator Coherency Port interface for more information.

developer.arm.com/.../Coherency

Martin,

You are correct for stand-alone Cortex-R5 - which doesn't have a MICRO_SCU option. I neglected to mention that I was working on Cortex-R5 SOC-400 PIL, which does have it.

Thanks for your clarification.

~Tom