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hello masters,
Now ,I am using M2S090-FGG484I chip , it has a cortex M3 core. I am programing it.
I want to offest the vector table to 0x8800 0000 ,but I found the VTOR regsiter bit 31-30 is reserved and TBLOFF is bit 28-7. So I think that it couldn't set the vector table to 0x8800 000.
However, when I set VTOR regsiter is 0x8800 0000, it aright worked . the vector table is seemingly located at 0x8800 0000 .
So, I want to know that the reason of it. could you help me ?
thanks very much
jent
Hi there, I have moved your question to the Architectures and Processors forum. Many thanks :)
Hello Jent,
VTOR (TBLOFF field) extends to full 32-bit range:https://developer.arm.com/documentation/ddi0403/d/System-Level-Architecture/System-Address-Map/System-Control-Space--SCS-/Vector-Table-Offset-Register--VTOR