We discovered that some special register operations are very expensive on Cortex-A72(Armv8.0) compared to Cortex-A53. Is there any way to narrow the gap? Thanks.
Results as below,Operation cost (ns)Operation Cortex-A72(1.8GHz) Cortex-A53(1.6GHz)unconditionally disable interrupts 20 0.63unconditionally enable interrupts 20 0.63read flags 9.5 0.63write flags 20 5.60
Some details:Unconditionally disable interrupts is: “msr daifset, #3”.Unconditionally enable interrupts is: “msr daifclr, #3”.Read flags is: “mrs reg, daif”.Write flags is “msr daif, reg”.