Hi, ARM communities!
I was wondering whether there is another hardware cache for GPT.
For example, storing (physical address -> GPT entry) so that hardware can quickly check the GPT for specific physical entries.
Sincerely
The architecture describes a set of behaviours and rules, not a specific implementation. So for example, the spec says when a GPT entry can/cannot be cached and what steps by software are required to guarantee visibility of a change to the GPTs. Exactly how that translates into a cache topology is up to the specific processor design
It is quite possible that different processor designs will make different decisions. More generally, Arm maintains the division between architecture and implementation (or micro-architecture) specifically so that hardware designers have freedom to innovate while still giving predictable behaviour to software.
Which is a long winded way of saying: maybe