After the reset, I would know the default memory attribute of the memory space, of course, wihout any MMU setting?
Cortex-A7 is Armv7-A. In the v7 Arm ARM, you want chapter B3.2 (The effects of disabling MMUs on VMSA behavior)
The summary is that Data accesses will be treated as Strongly Ordered.
But it's a little more complicate than that. For example, when you're in NS PL1/0, those default attributes can be overridden via HCR even without enabling the MMU. And the attributes of instruction fetches depend on the instruction cache enable. So I'd recommend reading the referenced chapter for the full answer.
Thank you for your quick reply. I took note about the default attribute state on data accesses and as you recommend me, I am going to read documentation you are pointing me. Thank you again Martin :)