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[Cortex-A] Permission fault due to code region mapped as read/write

When I try to execute code from a region mapped as read/write (AP[2] == 0), the CPU issues a permission fault (exception class == 0b100001, instruction fault status code == 0b001111). When I change the mapping to read-only (AP[2] == 1), the permission fault goes away. Is this expected behavior from the MMU? I thought executing code from a region mapped as read/write was allowed. Could someone point me to a section in the "Arm Architecture Reference Manual" that explains this?

For reference:

  • See ARM DDI 0487I.a, page D8-5136 for information about the AP (access permission) bits
  • See ARM DDI 0487I.a, page D17-5657 for information about exception class 0b100001 (Instruction Abort taken without a change in Exception level)
  • See ARM DDI 0487I.a, page D17-5680 for information about instruction fault status code 0b001111 (Permission fault, level 3)
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  • Yes, probably.

    Any page which is write-able at EL0 will always be non-executable to EL1 (or EL2 with E2H=1).

    For pages write-able at EL1/2/3, whether they are automatically treated as non-executable is controlled by SCTLR_ELx.WXN

    In the latest Arm ARM, you want info statement WXKKQ (Table D8-42) and info statement LJHZZ (Table D8-43)

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  • Yes, probably.

    Any page which is write-able at EL0 will always be non-executable to EL1 (or EL2 with E2H=1).

    For pages write-able at EL1/2/3, whether they are automatically treated as non-executable is controlled by SCTLR_ELx.WXN

    In the latest Arm ARM, you want info statement WXKKQ (Table D8-42) and info statement LJHZZ (Table D8-43)

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