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Cortex-A7 pipeline is non-symmetric, what does this attribute mean?

Cortex-A7 pipeline is non-symmetric, what does this attribute mean?

My understand is that cortex-A7 pipeline's five entries does not have the same two, in the contrary, the cortex-A15 have the two entries are the same.

ca7pipeline.PNGca15pipeline.PNG
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  • You're very welcome and thanks for the link. There is hardly any details on the A7 architecture in that document.

    Here is on old post that asks a similar question Cortex-a7 dual-issue? Surprisingly you can find out more details on the A7 arch from the GNU machine description file than ARM docs (I went through the whole A7 TRM and couldn't find a single reference to dual-issue apart from the disable bit in ACTLR)! The cortex-A7.md file has some insightfully comments that makes it a lot easier to decipher if you're not familiar with the syntax.

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  • You're very welcome and thanks for the link. There is hardly any details on the A7 architecture in that document.

    Here is on old post that asks a similar question Cortex-a7 dual-issue? Surprisingly you can find out more details on the A7 arch from the GNU machine description file than ARM docs (I went through the whole A7 TRM and couldn't find a single reference to dual-issue apart from the disable bit in ACTLR)! The cortex-A7.md file has some insightfully comments that makes it a lot easier to decipher if you're not familiar with the syntax.

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