• State Suggested Answer
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 350 subscribers
  • Views 1527 views
  • Users 0 members are here
Options
Related
How was your experience today?
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

About the difference between the terms l3_cache and ll_cache

zengshun.wu

HI ALL:

I came across the terms LL_CACHE_MISS ,LL_CACHE, L3D_CACHE_REFILL, L3D_CACHE when I was learning about ARMV8 PMU events. I am confused about the difference in the definition of LL cache and L3 Cache, are they equivalent?

  • 0

    Usually, Yes. But need to check the CPUECTLR configuration in firmware.

    If CPUECTLR.EXTLLC is set: This event counts any cacheable read transaction which returns a data source of "interconnect cache"/ system level cache.
    If CPUECTLR.EXTLLC is not set: This event is a duplicate of the L*D_CACHE_RD event corresponding to the last level of cache implemented.