Hi guys,Hope you all doing great.I need some help.
I am working on pl230 dma controller.
Q1) How many cycles does the arbitration consumes in this dma controller?
Q2) "Figure 2-9 DMA signaling when peripherals use dma_waitonreq"
In the figure shownabove why does the dma reads rsp and rdp before every RD and WD. why does the controller have to fetch source end pointer and destination end pointer before reading a word? Does it happen for all the cases?
rc -> Reads channel configuration channel_cfg.
rsp -> Reads source data end pointer, src_data_end_ptr.
rdp -> Reads destination data end pointer, dst_data_end_ptr.
RD -> Reads data.
WD -> writes data.
Q3) In the figure it is shown as the controller does rc,rsp,rdp. Is this operation same as reading the data structure??In datasheet it is mentioned that controller reads 4 words(including unused word) when it reads primary or aternate data structure. In figure there are only 3 word reads before reading first data. Why is it like that?