Hi.
I have a 16-byte AXI4 data bus.
I want to read 3 bytes, and there's a limitation to only use INCR burst.
I know that AXI only supports 1,2,4,8, etc byte-size bursts, but I have another module to receive the data from AXI and extract only the desired 3 bytes.
Length 0 (1 beat) is enough obviously.
Let's say the read address is 0x4a7a.
My question is, what is the correct ARSIZE for this read request?
I originally thought that SIZE = 0x2 (4 bytes) is the answer, exemplified below:
this Access is not aligned.
But I guess that SIZE = 0x3 (8 bytes) is also possible:
this Access is not aligned as well
Is there one better than the other? is one of them illegal?
Thanks
After further reading, I think that the first transaction, although legal, will not return the expected data.
So a ARSIZE 4 access to Address 0xA, will actually read only 2 bytes, from addresses 0xA and 0xB
This is because, as I understood, the first beat of an unaligned transfer will only access the number of bytes it can until it reaches its natural size boundary. In this case, it is up to (and not including) 0xC.
In some cases the device might provide the data for 0x8 and 0x9 as well, since those are part of the aligned line that is being read.
I would appreciate if someone can comment on the correctness or incorrectness of this explanation..
To read back the 3 bytes you want, at addresses 0xA-0xC, you will either need to use a 3-beat transaction (ARLEN=0x2) with ARSIZE=0x0 (8-bit), or a 2-beat transaction (ARLEN=0x1) with ARSIZE=0x1 (16-bit), or a 1-beat transaction (ARLEN=0x0) with ARSIZE=0x3 (64-bit).
Only the first of these options results in an aligned transaction which only accesses the bytes you want. The other two options will read back more data than is required, for your receiving module to then extract the valid bytes it wants.
I'm guessing it is the single transfer 64-bit width solution you want, which will access addresses 0x8-0xF.