Hello, everybody!I encountered a problem in the process of opening el2 stage2 address mapping on arm. I wanted to configure the one-to-one mapping from IPA to PA, but the error was reported as follows.
[ 37.921623] rcu: INFO: rcu_preempt detected stalls on CPUs/tasks:[ 37.927762] rcu: 2-...0: (1 GPs behind) idle=faa/1/0x4000000000000000 softirq=55/55 fqs=2625 [ 37.936387] (detected by 3, t=5252 jiffies, g=-823, q=29)[ 37.941877] Task dump for CPU 2:[ 37.945106] task:optee_example_h state:R running task stack: 0 pid: 204 ppid: 201 flags:0x00000002[ 37.955037] Call trace:[ 37.957496] __switch_to+0x138/0x198[ 37.961078] 0xffff000077bd7b00
I want to know how to configure TS0Z and PS in vtcr_el2 and what impact they have.It would be better if the mailer could explain it in detail or give a sample code.Thank you all
The error shows no information about stage 2 mapping.
Besides TS0Z and PS size, you should also pay attention to SL0 bit field, it sets the start level of table to look up.
Note that stage 2 table would use concatenated tables, which is not available in stage 1 table. concatenated tables will require specific table layout and alignment, if it was no do correctly, then stage 2 translation went wrong.
Please see arm architecture reference manual for more detail.
You could have a look at hafnium project, which is type1 hypervisor
Thank you for your answer! I'll give it a try.