Reading jyiu book on Cortex-M4 and general information about usage of PendSV exception type.
One application highlighted is of context switching in the RTOS wherein on a Systick timer interrupt, instead of context switching, it will set the PendSV bit. This will then execute the context switching at the lowest priority after all other interrupts have been handled. Again this is because the priority of PendSV will be kept the lowest.
However, is the same not possible if we just lower down the priority of Systick timer exception? In that case, if any interrupt is active, the systick timer exception handler will get executed after all other interrupts are done with.
If that is possible, then what is the major benefit in using PendSV?
Am I missing something?
A key question is, with all the other interrupts going on in a system with RTOS, is it possible that the SysTick exception get blocked out for over 1 tick?
If the OS tick timer (can be SysTick or other timer) is set to lowest priority, and when there are lots of other interrupt services happening, a SysTick exception can be missed, and therefore affect task scheduling as most OS use the OS tick timer to control task scheduling. For example, a certain task X is scheduled to take place in 100 ticks time, and if the system can miss OS ticks occasionally, then it means the task X will not get executed on time. Of course, there are other ways to implement task scheduling in other ways. An OS can use additional peripheral timers with higher interrupt priority for such purpose.
Thank you Joseph. Understand now the logic.
I have another question on SVC. Will add another thread.