How Can I Synchronize the Generic Timer values in different PEs in the same Core?

CNTPCT_EL0 timers of different PEs  in the same core should be triggered by the same system counter. In this way, they are synchronized.

Arm Server Based System Architecture (SBSA) mentions:

"

The architecture of the counter mandates that it must be at least 56 bits, and at most 64 bits. From Armv8.4,
for systems that implement counter scaling, the minimum becomes 64 bits.
The Generic Timer system counter also exports its count value, or an equivalent encoded value, through the
system to the timers in the PEs as part of the Generic Timer subsystem. This count must be available to the
PE timers when they are active, which is when the PEs are in power states where the PE timer is required to
be on.
The local PE timers have a programmable count value. When the value expires it generates a Private
Peripheral Interrupt for the associated PE

"

CNTPCT_EL0 timers of different PEs  in the same core should be triggered by the same system counter. In this way, they are synchronized.

Arm Server Based System Architecture (SBSA) mentions:

"

The architecture of the counter mandates that it must be at least 56 bits, and at most 64 bits. From Armv8.4,
for systems that implement counter scaling, the minimum becomes 64 bits.
The Generic Timer system counter also exports its count value, or an equivalent encoded value, through the
system to the timers in the PEs as part of the Generic Timer subsystem. This count must be available to the
PE timers when they are active, which is when the PEs are in power states where the PE timer is required to
be on.
The local PE timers have a programmable count value. When the value expires it generates a Private
Peripheral Interrupt for the associated PE

"