• State Accepted Answer
  • +1 person also asked this people also asked this
  • Locked Locked
  • Replies 15 replies
  • Subscribers 351 subscribers
  • Views 44617 views
  • Users 0 members are here
Options
Related
How was your experience today?
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

gicv3 aarch32 icc_hsre

PJ Nee

Hi,

I am working with GICV3 on a Cortex A53 that is currently in aarcH32 EL2 state.

When I try to read the ICC_HSRE I get an undefined instruction and the system crashes.

The instruction I am using is 

mrc p15, 4, r7, c12, c9, 5 @ ICC_HSRE

Any idea what is wrong here, and why I get an undefined instruction.

In aarch32 EL2, I am pretty sure this is the register that should be used to access the GIC System Register Enable Register? 

Parents
  • 0 in reply to 42Bastian Schick

    Bastian, this issue is showing up again. When I start up in EL3 (on i.MX8M) it seems I cannot access ICC_SRE_EL2. 

    If I put the following instruction in to my code I get a crash

    mrs x8, s3_4_c12_c9_5

    I believe this to be the correct mnemonic to access ICC_SRE_EL2.

    I've looked at this every way I can but find a way to make it work. Any ideas?

Reply
  • 0 in reply to 42Bastian Schick

    Bastian, this issue is showing up again. When I start up in EL3 (on i.MX8M) it seems I cannot access ICC_SRE_EL2. 

    If I put the following instruction in to my code I get a crash

    mrs x8, s3_4_c12_c9_5

    I believe this to be the correct mnemonic to access ICC_SRE_EL2.

    I've looked at this every way I can but find a way to make it work. Any ideas?

Children
No data