Hi,
I am working with GICV3 on a Cortex A53 that is currently in aarcH32 EL2 state.
When I try to read the ICC_HSRE I get an undefined instruction and the system crashes.
The instruction I am using is
mrc p15, 4, r7, c12, c9, 5 @ ICC_HSRE
mrc p15, 4, r7, c12, c9, 5
@ ICC_HSRE
Any idea what is wrong here, and why I get an undefined instruction.
In aarch32 EL2, I am pretty sure this is the register that should be used to access the GIC System Register Enable Register?
Our aarch64 code is written in assembly language (.s), and only executes some basic instructions before switching aarch32.
When I add an mrc call to read ICC_HSRE, I get an "unknown mnemonic" error. I can't find a workaround for this.
The name of the register is different (see above). Using these you should be able to enable the system register interface.At least it works for me, but then, I use AArch64 throughout the whole application.
Ok - I eventually figured out how to access ICC_SRE_EL2 in aarch64 bit mode.
Reading this register returns 0xf in aarch64 bit mode prior to the switch to aarch32.
Reads from ICC_SRE_EL3 produce a "synchronous abort" error (probably not unexpected as system is reports it is in aarch64 EL2 at the time).
The question remains though as to why accesses in aarch32 to ICC_HSRE fail with an undefined instruction error.