Using LDREXD in a task/normal mode and STREXD in ISR

On a Cortex R,  where ldm/stm are interruptible, can i use ldrex and strex for double words to pass from ISR to a task in this way?

in ISR:

 STREXD,   //  Ignoring  (yes, dumping it)  if it actually failed to write , do no spin-lock or retry here at all

in Task :

  LDREXD   // load ..
  CLREX     // clear exclusion

One core  (2 in dual lock-step),  no sharing mem with other cores.  Will this work for automically write/read double words in the scenario one ISR feeding a task?

And yes, no buffering between them.

Parents Reply Children
No data
More questions in this forum
There are no posts to show. This could be because there are no posts in this forum or due to a filter.