• State Accepted Answer
  • +1 person also asked this people also asked this
  • Locked Locked
  • Replies 3 replies
  • Subscribers 347 subscribers
  • Views 6730 views
  • Users 0 members are here
Options
Related
How was your experience today?
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

armv5TE

kalle

HI,

I am using an armv5TE (mv78100)I wonder  if I need to implement memory barriers in this architecture,(some people say not needed)

reason for my question is that I am facing system total freeze(now and then) and I suspect the system(freebsd) beeing on the idle loop!

Thanks

Parents
  • +1

    Architecturally you need to include barriers where ever the architecture says you need to include barriers; anything else is making assumptions about the CPU micro-architecture which may work on some CPUs and not on others.

    Many of the early ARMv5TE cores developed by ARM, such as the ARM926, were relatively simple micro-architectures so you could "get away with it" if you omitted certain barriers, but this is certainly not recommended practice and not likely to be portable. There are a number of alternative ARMv5TE implementations from ARM architecture licensees which have totally different microarchitectures, such as the Sheeva family CPU in your SoC,  which may include other optimizations and therefore be stricter in terms of the need to have barriers present.

    In short: the only way to write portable code is to include all of the barriers that the architecture requires.

    HTH,

    Pete

Reply
  • +1

    Architecturally you need to include barriers where ever the architecture says you need to include barriers; anything else is making assumptions about the CPU micro-architecture which may work on some CPUs and not on others.

    Many of the early ARMv5TE cores developed by ARM, such as the ARM926, were relatively simple micro-architectures so you could "get away with it" if you omitted certain barriers, but this is certainly not recommended practice and not likely to be portable. There are a number of alternative ARMv5TE implementations from ARM architecture licensees which have totally different microarchitectures, such as the Sheeva family CPU in your SoC,  which may include other optimizations and therefore be stricter in terms of the need to have barriers present.

    In short: the only way to write portable code is to include all of the barriers that the architecture requires.

    HTH,

    Pete

Children
No data