This saves some bytes (4 MiB - 8 KiB) but has one drawback: one additional memory reference is required to convert a virtual to a physical address. Here, the TLB (Translation Lookaside Buffer) comes into play. It is a (compared to the L1 cache) small cache and stores the association of a virtual address to a physical address in hardware. Special hardware is used here, comparable to a hashtable (std::unordered_map in the C++ standard library), with the difference that it's implemented in hardware and therefore faster.
In ARM1176, does TLB save level-1 page directory entries? I know that section's descriptor is saved in level-1 page table and TLB saves section's descriptor. Besides section's descriptor, there are page directory entries in level-1 page table, which is used to point to level-2 page tables. So, my question is: does TLB save level-1 page directory entries? Can anybody clarify the question for me? Thanks in advance.