It has been a busy couple weeks for chiplet news. NVIDIA announced an exciting new NVLink-C2C interconnect for tightly coupled links between its CPU, DPU, GPU, and other integrations with its partners and customers. And UCIe (Universal Chiplet Interconnect Express), whose charter is to build an ecosystem for on-package innovation, was formed. In this blog, we look at key use cases driving chiplet adoption and how Arm is contributing to help drive a successful chiplet ecosystem.
Chiplets have been around for many years across many different applications, but we are at an inflection point. Chiplets can increase performance by expanding beyond the reticle limit while still providing the ability to manage silicon cost. The slowing of Moore’s law has been discussed in the industry for some time. While advanced nodes (5nm and below) offer a benefit for logic, the scaling of IO and memory components of a system-on-a-chip (SoC) has slowed significantly, which translates to higher cost for less benefit.
A comprehensive chiplet solution includes many different elements from protocol to PHY to bump pitch to packaging technology. Today, SoC designers are pulling together different combinations of components to achieve their performance, cost, and system composition goals. The wide variety of solutions can lead to confusion. There are two common viewpoints to chiplet integration.
The first viewpoint is to break-up a traditional monolithic SoC into multiple smaller components. There is a common protocol, memory, debug, and security model in this approach. The SoC designer strives to make the extension of an on-chip bus to multichip as seamless as possible.
The second viewpoint looks to take an existing board level component connected via an industry-standard board-level interconnect and integrate it inside the package due to the order of magnitude better bandwidth and energy efficiency. The SoC designer strives to use the existing framework as much as possible with an optimal die-to-die PHY and packaging solution for their needs.
Arm established the AMBA CHI (Coherent Hub Interface) to provide on-chip communication for highly scalable, many core, heterogeneous SoCs. Due to its scalability, CHI is also a great fit for the protocol layer within a complete multichip interface specification. CHI is compatible with industry standards such as CCIX and UCIe along with custom solutions such as the NVIDIA NVLink-C2C interconnect. The benefits of using CHI include:
NVIDIA NVLink-C2C provides the connectivity between NVIDIA CPUs, GPUs, and DPUs as announced with its NVIDIA Grace CPU Superchip and NVIDIA Hopper GPU. The multichip solution combines the benefits of CHI with an optimal PHY and packaging solution that leverages NVIDIA's world-class SerDes and link technologies. This enables a new class of composable, integrated products built via chiplet whether the end SoC targets scale-up compute or advanced heterogeneous CPU-GPU workloads.
The need for chiplet-based processors to improve performance and reduce cost is well understood. But until recently there has been no agreement on how to use the benefits of chiplet architectures beyond vendor-specific implementations. The Universal Chiplet Interconnect Express (UCIe) standard has been developed to fill this need. UCIe has pulled together industry leaders from semiconductors, packaging, IP suppliers, foundries, and cloud service providers to drive a new open chiplet ecosystem. The UCIe 1.0 specification provides a complete standardized die-to-die interconnect with physical layer, protocol stack, software model, and compliance testing. This enables end-users to mix and match chiplet components from a multi-vendor ecosystem for SoC construction.
The UCIe protocol layer leverages PCIe and CXL for the ability to integrate a traditional off-chip device with any compute architecture. In addition, UCIe has architected the ability to plug in other protocols (such as AMBA CHI) via the streaming protocol interface allowing flexibility in protocol for the SoC product.
For more information on UCIe technology and membership, visit the UCIe website.
The only certainty with chiplets is that there will be significant growth in adoption over the decade. Across the industry, there is continual investment in innovation and standardization which will translate to increased performance, lower costs, and broader adoption. At Arm, we expect to see a range of custom and standard implementations. And we are excited to see what new performance points and unique SoCs are created with chiplet technology.
NVIDIA announces Grace Superchip
Great article!