What is AMBA?

I had just joined Duolog as a graduate of business through a graduate development program which links graduates with small to medium Irish enterprises. My role there was to expand their marketing reach in the competitive marketplace, but with no technical background I had to get my head around so many terminologies, acronyms and engineering talk to fully understand how the industry and company operated.

One name that crops up everywhere is ‘AMBA’, and when I looked up the term, and then asked the engineering team about it, I received the answer: ‘Oh it is just a standard that engineers use, ARM created it back in the 90’s, I don’t think you will have to worry about it too much.’ – OK, AMBA is a standard and I don't have to worry about it in my role at Duolog.

After a bit of a wild ride as an employee, here I am, post-acquisition, working for ARM. My role entails ensuring that the marketing channels such as the website are up to date and optimized for the user. One thing I have found difficult is getting to grips with all the products, technologies and jargon in the System IP space for which I am responsible. This is where I was reunited with the standard I was told I wouldn’t have to worry about – AMBA. I felt this small blog might hold some value for those not familiar with AMBA, and I hope it explains it somewhat.

So what is AMBA?

“The ARM AMBA (Advanced Microcontroller Bus Architecture) protocol is an open standard, on-chip interconnect specification for the connection and management of functional blocks in a System-on-Chip (SoC). It facilitates right-first-time development of multi-processor designs with large numbers of controllers and peripherals. AMBA promotes design re-use by defining common interface standards for SoC modules.” (ARM.com)

Or if you prefer:

“Advanced Microcontroller Bus Architecture (AMBA) is an architecture that is widely used in system-on-chip designs, which are found on chip buses. The AMBA specification standard is used for designing high-level embedded microcontrollers. AMBA’s major objective is to provide technology independence and to encourage modular system design. Furthermore, it strongly encourages the development of reusable peripheral devices while minimizing silicon infrastructure.” (techopedia.com)

Or put a lot simpler:

“It’s the interface(s) everyone uses to bolt blocks together in their chip.” (me)

There are also a number of other acronyms associated with AMBA such as AHB or AXI. Below I have listed the seven main interfaces along with my interpretation of their purpose.

Name	Acronym	My Interpretation
Advanced System Bus	ASB	Now obsolete, so don’t worry about this one!
Advanced Peripheral Bus	APB	Simple, easy, for your peripherals
Advanced High-Performance Bus	AHB	Now used a lot in Cortex-M designs
Advanced eXtensible Interface	AXI	The most widespread, now up to AXI4
Advanced Trace Bus	ATB	For moving trace data around the chip, see CoreSight
AXI Coherency Extensions	ACE	Used in big.LITTLE systems for smartphones, tablets, etc.
Coherent Hub Interface	CHI	The highest performance, used in networks and servers

A brief history of AMBA

Since it is a standard, I thought to myself ‘how did that come about?’ The story of AMBA goes all the way back to 1995, when ARM was much smaller and received some EU funding. With this EU support, Advanced Microcontroller Bus Architecture (not the ARM Bus Architecture), which was introduced as an open architecture in 1996 after being developed in house during the previous year. It facilitates development of multiprocessor designs with large numbers of controllers and peripherals. Since its inception, the scope of AMBA has, despite its name, gone far beyond microcontroller devices. Today, AMBA is widely used on a range of ASIC and SoC parts including applications processors which are typically found in modern portable mobile devices like smartphones.

AMBA soon became a registered trademark of ARM. An important aspect of a SoC is not only which components or blocks it houses, but also how they interconnect. AMBA served as a solution for how the blocks would interface with each other. It soon became the 'de facto' standard interface for anyone which to bring a controller or a peripheral IP block to market.

The first version of AMBA included two buses, the Advanced System Bus (ASB) and Advanced Peripheral Bus (APB).

In its second version, AMBA 2, ARM added AMBA High-performance Bus (AHB) which is a single clock-edge protocol. AMBA 2 was widely used on ARM7, ARM9 based designs and still is today on ARM Cortex-M based designs.

In 2003, ARM introduced the 3rd generation, AMBA 3, including Advanced eXtensible Interface (AXI) to reach even higher performance interconnect and the Advanced Trace Bus (ATB) as part of the CoreSight on-chip debug and trace solution.

In 2010 the AMBA 4 specifications were introduced starting with AMBA 4 AXI4, before extending system wide coherency with AMBA 4 ACE in 2011 (This system coherency allows different processor clusters to share memory and enables technology such as ARM's big.LITTLE processing. These are widely used on ARM’s Cortex-A9 and Cortex-A15 processors.

In 2013 the AMBA 5 CHI (Coherent Hub Interface) specification was introduced, with a re-designed high-speed transport layer and features designed to reduce congestion. It has been architected for scalability to maintain performance as the number of components and quantity of traffic rises. This includes placing additional requirements on masters to respond to coherent snoop transactions that mean forward progress for particular masters can be more easily guaranteed in a congested system. The separation of the identification mechanism into master identifiers and transaction identifiers allows the interconnect to be constructed in a more efficient manner. AMBA 5 architecture defines the interfaces for connection of fully coherent processors, such as the Cortex-A57 and Cortex-A53.

AMBA 5 CHI

I recently worked on the product release of the new CoreLink Cache Coherent Network family members. The new series of CoreLink Cache Coherent Networks is supported by AMBA 5 CHI protocol. williamorme recently covered 5 things you may not know about AMBA 5 CHI which is an enormously valuable resource for anyone looking to understand the newer AMBA specification.

The New CoreLink Cache Coherent Networks

In Conclusion

It is very difficult to summarize nearly 20 years of development of the AMBA architecture, and I hope this short blog provides a simple overview of its function as well as a brief summary of the architecture's history.

To summarize; AMBA is a de-facto standard for on-chip communication and its benefits include

• Enabling IP re-use.
• Flexibility of requirements.
• Multilayer architecture.
• Compatibility between design teams and vendors.
• Industry wide support.

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