This content was initially posted 10 July 2013 on blogs.arm.com
We are pleased to announce the release of VIXL, a dynamic code generation toolkit for ARMv8 that we hope will enable JIT creators to rapidly target the new ARMv8, A64 instruction set.
Over the past few years we (the ARM JIT team) have worked on the code generators of many of the leading JIT compilers for the JavaScript and Java languages. During that time we built up a strong knowledge base on some of the pitfalls and time-sinks involved in creating a good JIT compiler backend. This led us to develop some tools to help improve our productivity. With ARM announcing the new Cortex-A50 range of processors supporting the AArch64 execution state we decided that we would focus our efforts on A64 tooling to enable developers to rapidly port programming language virtual machines for this new processor range, ahead of actual silicon availability.
VIXL's MacroAssembler class implements functions that generate A64 code. It supports almost every user-space integer instruction, and most floating-point instructions. These are the instructions we have used to date, to generate code from the JIT compilers we have been working on at ARM. Since we are providing the full source code of the toolkit you are free to extend the assembler in any way you wish.
The disassembler can disassemble any instruction that the assembler can generate.
The instruction set simulator/debugger allows you to run or single-step your generated code and view registers and memory. The simulator is designed specifically to run your JIT-compiled code without the need to first port your entire virtual machine to run in AArch64 execution state. As a consequence the speed of your virtual machine is not significantly hampered by the speed of the simulator and you can get very rapid turnaround on tests since the rest of your virtual machine runs natively.
All of the VIXL components with the exception of the debugger come with tests to ensure that they perform correctly on your platform and we have included several examples on how to use VIXL to generate code sequences.
Our goal with VIXL is to enable you to start generating A64 code from your JIT compiler as quickly as possible. You can generate, test and run A64 code from your JIT compiler before you have ported the rest of your virtual machine runtime to ARMv8. If your runtime already builds and runs on a different architecture you can plug the VIXL runtime assembler into your JIT compiler, link this to the VIXL simulator and start generating and executing your A64 code.
We have released VIXL on github here: https://github.com/armvixl/vixl under a three clause BSD license. We hope you enjoy using it.
Rod Crawford is Director of Software Technology at ARM. He is passionate about empowering people through technology, enabling them to garner and communicate relevant knowledge -- knowledge that relates to the time and place where they are and to the people around them. Rod has been part of the mobile computing revolution for 22 years, 18 of them at ARM. Rod works directly with many of the major open software technologies and companies, helping create new and exciting ways to compute and communicate while on the go, and thus give a voice to the inhabitants of the global village.
Now on Linaro web site:
Git: https://git.linaro.org/arm/vixl.git Presentation: http://connect.linaro.org/resource/sfo15/sfo15-500-vixl/