ARMv7A family members will have PMU on the processor. Using this PMU, we can access cycle counts. Can we relay on this using the simulator?
For most ARM A-profile cores one of the most dominant effects is memory performance; how long does it take to get data from DDR (latency, bandwidth, outstanding transactions), how big is the cache vs the application data set, how big is the TLB vs the application data set, etc. For 95% of real-world software the problem isn't really how long an instruction takes on the pipeline, but how you avoid stalling on main memory and so keep the pipeline busy.
RTL simulation should be realistic, but it's only going to be as realistic as the memory system you have wired your system into, so it's worth making some effort to ensure your memory system is as close to realistic as possible.
HTH, Pete