The Cygnal f12x has 128k of flash and using code banking defeats the purpose of using Cygnal. The overhead of banking slows the program down as much as using the Cygnal speed it up. Thus: Is there a way in Keil to make all movc a,@a+dptr generated by the compiler/written in assembler access the upper 64k WITHOUT using bankswitching. The Cygnal chip has simple means of data bank select. in advance thanks, Erik
Hej Erik! A Philips FAE once told me, that Keil tools couldnt acces anything beyond 64kb without using banking. Raisonance tools should be able to adress things straight linear. happy programming! and have a nice weekend Per
The only method I can think of is to declare your constants as far, write your own far variable handler using Cyngal's ability to fetch constants from the page being different than the one holding the code. But, that's limited to 32K page size anyway... regards Dejan
I don't know how the Cygnal (Silicon Labs?) works, but this is quite easy with the Triscend - if I understand you correctly: You use the XCONST option to place items defined as const into the Flash, and then use a Data Mapper to map this into XDATA space - without the need for any (Keil) Bank-switching. String literals can similarly be placed in the Flash to appear in XDATA space. You need the OHX51 Object-to-Hex converter, but I think the version shipping with C51 still has a bug: http://www.keil.com/forum/docs/thread2074.asp You may need to contact Keil direct for the fixed version. Hope that heps, A.
The overhead of banking slows the program down as much as using the Cygnal speed it up. Code banking only slows down calls to functions when a bank switch must occur. And, you, as the developer, are 100% in control of where those functions reside. Also, only the CALL and RETURN instructions (for functions where a bank switch is required) are slowed and that's only by a very few instructions. The following knowledgebase article describes a little of how the code banking mechanism works. The examples demonstrate what happens for various types of bank switches. http://www.keil.com/support/docs/1059.htm The following article discusses how to create code banking programs in general. Pay special attention to the Program Organization section. It shows you how to design programs to reduce the number of bank switches that happen. http://www.keil.com/support/docs/158.htm The following knowledgebase article explains just what to do to use Code Banking with the Cygnal devices. http://www.keil.com/support/docs/2441.htm Jon
Code banking ... I have neither need nor no desire for CODE banking, I just want constant data to reside an upper 64k and load with NO overhead. Erik
Well, it's going to be pretty hard to get a full 64K of constants. The reason is that whenever a MOVC executes to READ the constant, it's going to have to do so from that extra code memory. So, before the MOVC, you're going to need instruction(s) to switch the code memory around. And, you'll need to switch it back when you're done. If you want the compiler to do all of this for you, you'll need to use the XBANKING.A51 file to configure memory banking. And, you'll have to figure out the architecture of your system. If you want to do this manually, you'll have to write some kind of routine to read const strings from the additional code space. This may be the way best suited to your application. Jon
So, before the MOVC, you're going to need instruction(s) to switch the code memory around. And, you'll need to switch it back when you're done. No, the Cygnal F12x have SFR bits directing movc and other bits directing code fetch. I can live with getting only 32k for this. OK let me rephrase. In hardware I can specify that movc goes to 64-96k by setting a SFR. Will the software (specifically Keil "hidden functions") burp if I set those bits at the beginning of startup.a51. Can I tell the compiler to forget about banking, and let the linker locate constants in 64-96k Erik
You can do it only with CX51 and LX51 using far variable modifier and then by telling the linker where the constants are - howewer, compiler will generate a call to far variable handler (which you have to provide) for every access to far variables...some kind of bank switching anyway :( - Dejan
"Can I tell the compiler to forget about banking, and let the linker locate constants in 64-96k" Yes, that sounds exactly the same as what I'm doing with the Triscend (only the SFR names have been changed...) This does require LX51, but not CX51, and not any 'far' modifiers.
Can I tell the compiler to forget about banking, and let the linker locate constants in 64-96k The problem is that there are no instructions or addressing mode of the Cygnal part for accessing 17 bits of address space. Addressing larger than 16-bit addresses must be done in software. The way this is done is by setting the COBANK sfr to the bank number (0-3) and setting the address (in DPTR). The compiler does not intrinsicly KNOW about the COBANK sfr. That's why the XBANKING.A51 file is required. This file allows you to use just about any memory banking scheme. If you don't want to use it, you can easily create your own scheme of setting the COBANK sfr and reading memory. However, you'll have to manage all of it. Jon
"The problem is that there are no instructions or addressing mode of the Cygnal part for accessing 17 bits of address space." Same with Triscend. "The way this is done is by setting the COBANK sfr to the bank number (0-3) and setting the address (in DPTR)." Triscend does it via the Address Mappers. "The compiler does not intrinsicly KNOW about the COBANK sfr." Similarly for Triscend's Address Mappers. "If you don't want to use it, you can easily create your own scheme of setting the COBANK sfr and reading memory. However, you'll have to manage all of it." Yep, that's the way I do it on the Triscend. Thus it sounds to me like a very similar approach should work with Cygnal.
The problem is that there are no instructions or addressing mode of the Cygnal part for accessing 17 bits of address space. Addressing larger than 16-bit addresses must be done in software. Incorrect, if the compiler/linker allowed it. The Cygnal (and based in the above the Triscend as well) have the ability to read data from one half and instructions from the other half of the 128k.
The Cygnal (and based in the above the Triscend as well) have the ability to read data from one half and instructions from the other half of the 128k. I'm not sure I understand what you are saying. Are you saying that the Cygnal devices fetch program code for address 0x0000 from one physical memory address but retrieve code using MOVC from address 0x0000 from a different physical memory address? If that's the case, then this is a feature no one could possibly use. Static jump tables would not work with this scenario. Neither would tables of function pointers and so on. I didn't get this from the Cygnal documentation but maybe I'm not reading the right part. Nonetheless, I still stand by my previous statement that, "...there are no instructions or addressing mode of the Cygnal part for accessing 17 bits of address space. Addressing larger than 16-bit addresses must be done in software." Jon
Actually, only devices with 128K of flash can do that (F12x family) - you can programm page register to fetch opcodes from one bank and to fetch movc data from another...If you are careful, you use that as an advantage in the scenario Erik proposed... - Dejan
Ahhh. The PSBANK register. The problem with having a different space for MOVC and instruction fetches is that the compiler stores constants in code space. Changing the target address for MOVC would cause the program to fail. Constant tables are generated by the compiler for all kinds of stuff (like switch statements, jump tables, static arguments, and so on). Jon