The GICv2's documentation describes as a programming error (see 5.2.4) having two or more copies of the same interrupt in the List registers.
The notion of "same interrupt" is a bit vague when it comes to SGIs. Is it an error to program several LRs with the same SGI number, but distinct source CPUIDs?
I speculate that it is not an error, because the description of GICH_LR.VirtualID states that each valid interrupt stored in the List registers must have a unique VirtualID for that virtual CPU interface, suggesting that this condition is enough; and the VirtualID encodes both the interrupt ID and the CPUID.
Can anyone confirm/infirm my reasoning?