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VTTBR_EL2 getting populated at EL1 ?

armdev

Hi,

I am facing an issue where after doing "eret" to EL1 when I see from DS-5 debugger MMU view I can see VTTBR_EL2 entries.

It seems that at EL1 level VTTBR_EL2 is visible as debugger is able to parse that memory ?  I am confused as my Linux doesn't map VTTBR_EL2 address memory.

Also I can not populate the "memory view" for this address.

I am also trying to figure out if this because my Stage 2 TLB is not invalid. What is the correct way to invalidate TLB for stage 2 page tables ?

Thanks.