Hi everyone,
as I asked on http://stackoverflow.com/questions/25907502/armv8-foundation-model-switches-and-leds, I am trying to write
a value to the "switches" and "leds" register of the Foundation Model, to get some feedback (I've got some UART issues to debug).
All attemps to write to these registers are failing, even just after boot at EL3 in 64 bits mode.
I recently discovered that I got a synchronous exception classified as External.
ESR_EL3 is 0x96000250 (Exception class 0x250, Data Abort, IL is 32 bits and ISS explains that a external abort on write has occured).
ARM's user manual for the model specifies that these registers are R/W registers. Did I miss something to be able to modify them by software ?
Best,
Vincent
Hi Vincent,
Sorry we have not seen your question earlier.
What is the exact address that is triggering the abort?
It should be contained in the FAR_EL3 register.
Can you also try with a STR instruction instead of STRB?
It seems the SysReg component only accepts 32 bits aligned write, I am not sure why the reads would behave differently.
Edit: Can you also confirm which version of the Foundation model you are using (--version)?
Also what is the command line you are using to start the model?
Regards,
Simon
Hi Simon,
I tried to write on the address 0x1c010004 which I got from the Foundation User guide (--version is ARM V8 Foundation Model r0p0 (model build 9.0.24)).
The FAR_EL3 register holds the exact same address.
For the record, I start the model using the following line:
Foundation_v8 --no-secure-memory --cores=1 --no-gicv3 --visualization --image kernel.elf --switches=0xbb
I first read the switches with a LDRB instruction, which goes fine and display the initial 0xbb value.
It is only the writing that fails. I switched from STRB to STR and now the error is gone, and the switches are correctly updated, thank you very much for the suggestion.
Do you have some hints on why using STRB instead of STR would trigger such an exception ?
The exception occurs because the peripheral (in that case the LED and switches registers) requires aligned accesses.
I am not sure why that is (I can see where it is aborting the access in our model but I don't think it's correct), I will investigate a little bit more and let you know.
After doing some digging, I have found that the SysReg components in the foundation model is intended to allow only word (32 bits) writes, and only aligned reads (but they can be byte-only) this should be documented more clearly, sorry about that.
thank you for the complementary information !