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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3581 Questions
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  • Not Answered

    system reset request (NVIC_systemreset) does not restart the M4 controller 0

    • Cortex-M4
    13152 views
    3 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Not Answered

    Cortex-M7 (Armv7-M) Fault Question 0

    3739 views
    1 reply
    Latest over 5 years ago
    by 42Bastian Schick
  • Not Answered

    How AXI addressing works for fixed burst with unaligned address. 0

    • AMBA
    • AXI
    • alignment
    48440 views
    8 replies
    Latest over 5 years ago
    by ngehlot
  • Answered

    geting hex file from lpc1768 +1

    8052 views
    7 replies
    Latest over 5 years ago
    by Andy Neil
  • Answered

    timestamp generator register location on Cortex-M4 (PSELCTRL CNTCR) 0

    • CoreSight Architecture
    • Cortex-M
    • Debugging
    • CoreSight
    • Cortex-M4
    7049 views
    3 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Not Answered

    LPC546xx MASS ERASE ulink2 0

    1878 views
    0 replies
    Started over 5 years ago
    by Dark0711
  • Answered

    range of BL instruction in arm state 0

    • Armv7-A
    • Armv7-R
    39417 views
    10 replies
    Latest over 5 years ago
    by chevestong
  • Not Answered

    ARM Neon vs Intel SSE 0

    23659 views
    1 reply
    Latest over 5 years ago
    by 42Bastian Schick
  • Not Answered

    How to determine CMSIS version? 0

    • CMSIS
    6882 views
    4 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Answered

    How Can I jump from EL1 to EL0 in bare metal environment 0

    • EL1
    • ARMv8 Exception Model
    • EL0
    • Armv8-A
    • Arm64
    25232 views
    3 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Suggested Answer

    Timer interrupts synchronization in Cortex M4 0

    • Cortex-M4
    • Interrupt
    5069 views
    2 replies
    Latest over 5 years ago
    by Andy Neil
  • Answered

    Non-secure configuration of UART1 on Arm Musca-A1 0

    • Musca-A
    • TrustZone for Armv8-M
    12609 views
    4 replies
    Latest over 5 years ago
    by Daniel Oliveira
  • Answered

    How long does it take for Cortex A53 to exit low power state? +1

    19885 views
    2 replies
    Latest over 5 years ago
    by Andy Neil
  • Not Answered

    Optimization of Neon Intrinsics on ARM cortexa53 0

    • Cortex-A53
    • AArch64
    • Optimization Solution
    • GCC
    • NEON
    • Arm Assembly Language (ASM)
    27840 views
    12 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Answered

    what's the name of this electronic component? +2

    4675 views
    1 reply
    Latest over 5 years ago
    by Dean03
  • Not Answered

    Problem in understanding behaviour of GCC compiler (aarch64-none-elf-gcc) on Neon intrinsics for ARM cortex a53 0

    • Cortex-A53
    • Optimization Solution
    • GNU Assembler
    • GCC
    • NEON
    • Compilers
    28924 views
    10 replies
    Latest over 5 years ago
    by khan777
  • Answered

    Cortex M0 - Returning from Interrupt 0

    • Cortex-M0
    • Arm Education Media
    10828 views
    13 replies
    Latest over 5 years ago
    by Mezan1
  • Not Answered

    gcc does not generate correct code while building PIC 0

    • GCC
    • Thumb
    • GNU Arm
    • Thumb2
    • Arm Assembly Language (ASM)
    • Cortex-M4
    7936 views
    3 replies
    Latest over 5 years ago
    by a.surati
  • Not Answered

    Setting MPU_RASR for Memory Protection Unit with correct values of TEX/C/B/S bits 0

    4001 views
    1 reply
    Latest over 5 years ago
    by Uma Ramalingam Arm Employee Badge
  • Not Answered

    Cortex M3 System Design - Simulation Environment 0

    4332 views
    2 replies
    Latest over 5 years ago
    by Brixton
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