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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3581 Questions
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  • Answered

    Pin Assignments for STM32F427IGH6 on MPS3 0

    2602 views
    3 replies
    Latest over 4 years ago
    by Andy Neil
  • Suggested Answer

    VMSAv8-64 -- worst-case effects of misprogramming of the Contiguous bit +2

    • Armv7-A
    • AArch64
    15581 views
    5 replies
    Latest over 4 years ago
    by wrw
  • Not Answered

    Secure memory on Raspberry Pi 3 0

    • Cortex-A53
    • Raspberry Pi 3
    • Armv8-A
    • Cortex-A
    • TrustZone
    2926 views
    0 replies
    Started over 4 years ago
    by Hamed
  • Answered

    wake MCU from sleep by event 0

    • STM32 L0
    • Interrupt Handling
    • STM32
    • event
    3466 views
    2 replies
    Latest over 4 years ago
    by AmirSina
  • Answered

    why does LDR takes two cycle to be executed 0

    • Cortex-M0
    • Cortex-M
    14633 views
    9 replies
    Latest over 4 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    MPU Fault for Background Region 0

    3326 views
    4 replies
    Latest over 4 years ago
    by Lokesh4K
  • Not Answered

    Why there is no translation tables concatenation for stage 1 of VA translation? 0

    4773 views
    3 replies
    Latest over 4 years ago
    by Cliff B
  • Suggested Answer

    Share aarch64 page tables created by Linux with SMMU 0

    • Cortex-A53
    • CoreLink MMU-500 System Memory Management Unit
    • Corelink
    • CoreLink CCI-400 Cache Coherent Interconnect
    • CoreLink CCI-400
    • Cortex-A5
    • ACE
    • CHI
    • Cortex-A
    • Linux
    23890 views
    5 replies
    Latest over 4 years ago
    by Zenon (Zhilong) Xiu Arm Employee Badge
  • Not Answered

    Multiple registers in CPU 0

    3514 views
    0 replies
    Started over 4 years ago
    by techguyz
  • Not Answered

    Download the old versions of ARM A64 Instruction Set Architecture 0

    • Base ISAs
    • Documentation
    • Arm64
    2952 views
    1 reply
    Latest over 4 years ago
    by Zenon (Zhilong) Xiu Arm Employee Badge
  • Not Answered

    Beginner ARM project proposals 0

    • FPGA
    • Arm Education
    2248 views
    0 replies
    Started over 4 years ago
    by Anis.ait
  • Not Answered

    No segmentation fault when expected with aligned load and store 0

    • SIMD and Vector Processing Instructions
    • Armv8-A
    • NEON
    • Software Development
    9581 views
    5 replies
    Latest over 4 years ago
    by Sheila
  • Suggested Answer

    MPU on ITM Address Range 0

    1860 views
    1 reply
    Latest over 4 years ago
    by Mahmood Yakub Arm Employee Badge
  • Not Answered

    Cortex-A9 MMU configuration - TEX [2] bit 0

    4381 views
    6 replies
    Latest over 4 years ago
    by Zenon (Zhilong) Xiu Arm Employee Badge
  • Not Answered

    Can't understand the configuration of MPC on M33 +1

    1471 views
    0 replies
    Started over 4 years ago
    by ziming
  • Answered

    Cortex M recommendation for image processing 0

    2783 views
    1 reply
    Latest over 4 years ago
    by Andy Neil
  • Not Answered

    uboot can access tzpc registers? 0

    4750 views
    2 replies
    Latest over 4 years ago
    by Zenon (Zhilong) Xiu Arm Employee Badge
  • Not Answered

    recovery from BTAC or GHB parity error 0

    3225 views
    1 reply
    Latest over 4 years ago
    by Zhifei Yang Arm Employee Badge
  • Not Answered

    Cortex-A76 , DynamIQ in mobile 4.14kernel ? 0

    • Cortex-A76
    3147 views
    1 reply
    Latest over 4 years ago
    by Zhifei Yang Arm Employee Badge
  • Not Answered

    Cross Compilation on Qt OPC UA Server on Raspberry Pi fails 0

    4003 views
    1 reply
    Latest over 4 years ago
    by Zhifei Yang Arm Employee Badge
<>
Topics being discussed in this forum
  • AArch64
  • AMBA
  • Arm Assembly Language (ASM)
  • Armv7-A
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  • Linux
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  • NEON
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