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Break point at SWI handler

Henry

Hi everyone,

I'm using Jlink with openocd to debug ARM926EJ-S and encountered problem when executing SWI command.

Even though I don't set a break point at SWI handler but the CPU breaks at SWI handler automatically. How to remove the break point and make the CPU run continuously after every SWI command ?

Thank you very much.

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    ARM does not define a specific breakpoint instruction. It can be different in different OSes. On ARM Linux it's usually an UND opcode (e.g. FE DE FF E7) in ARM mode and BKPT (BE BE) in Thumb.

    With GCC compilers, you can usually use __builtin_trap() intrinsic to generate a platform-specific breakpoint. Another option is raise(SIGTRAP).

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    ARM does not define a specific breakpoint instruction. It can be different in different OSes. On ARM Linux it's usually an UND opcode (e.g. FE DE FF E7) in ARM mode and BKPT (BE BE) in Thumb.

    With GCC compilers, you can usually use __builtin_trap() intrinsic to generate a platform-specific breakpoint. Another option is raise(SIGTRAP).

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