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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3581 Questions
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  • Answered

    TTBR1 translation fault when using an identity mapping 0

    • Cortex-A53
    • AArch64
    • Raspberry Pi 3
    • Armv8-A
    • Memory Management Unit (MMU)
    10756 views
    2 replies
    Latest over 6 years ago
    by maldus
  • Answered

    RTOS Design Considerations Version 2.0 - SVCall behavior question 0

    • CHI
    • Documentation
    • Cortex-A
    • Cortex-M
    • TrustZone
    • Armv8-M
    8511 views
    1 reply
    Latest over 6 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    Measuring Cortex-M4 instruction clock cycle counts +1

    • Cortex-M
    • Cortex-M4
    20521 views
    13 replies
    Latest over 6 years ago
    by Dan Lewis
  • Not Answered

    Interfacing FRDM-K64F with Camera module 0

    • Cortex-M
    • Cortex-M4
    • Interface
    2649 views
    0 replies
    Started over 6 years ago
    by Shwetakr
  • Not Answered

    Suggest implementing ARM 64-bit processor with Threshold Logic - preferably Resonant Tunnel Diodes 0

    1474 views
    0 replies
    Started over 6 years ago
    by RPearson2
  • Answered

    Prefetch Abort in Cortex M processors +1

    • Cortex-M
    • Cortex-M4
    10052 views
    10 replies
    Latest over 6 years ago
    by kmdinesh
  • Answered

    How does the ARM CA53 4 core join NEON on only 2 cores? +1

    • Cortex-A53
    • NEON
    • Cortex-A
    11826 views
    4 replies
    Latest over 6 years ago
    by Jason Andrews Arm Employee Badge
  • Answered

    Updating PC register in aarch64 mode +1

    • AArch64
    • Cortex-A55
    • Armv8-A
    • Cortex-A
    11957 views
    2 replies
    Latest over 6 years ago
    by Jason Andrews Arm Employee Badge
  • Answered

    Is there a vendor based on M23 or M33 chip? +1

    • TrustZone
    • Armv8-M
    13884 views
    3 replies
    Latest over 6 years ago
    by YU *** YU
  • Answered

    How to properly measure sleep time with DWT? +1

    • Cortex-M
    • Cortex-M4
    • stm32f4
    8849 views
    1 reply
    Latest over 6 years ago
    by Woeber Johannes
  • Not Answered

    MPU 0

    • Cortex-M
    • Cortex-M4
    • stm32f4
    3266 views
    1 reply
    Latest over 6 years ago
    by Vanhealsing
  • Answered

    Number of performance monitoring units in ARM Cortex A-53 and A-9 +1

    • Cortex-A53
    • Cortex-A9
    • Cortex-A
    8066 views
    1 reply
    Latest over 6 years ago
    by 42Bastian Schick
  • Answered

    Push/Pop in Cortex A55 64bit mode +1

    • Cortex-A55
    • Cortex-A
    • 64-bit
    9360 views
    1 reply
    Latest over 6 years ago
    by 42Bastian Schick
  • Answered

    Barrier after access to memory mapped register? 0

    • Cortex-A53
    • AArch64
    • Cortex-A
    15105 views
    9 replies
    Latest over 6 years ago
    by dedoz
  • Answered

    Pipeline and Reorder Buffer on Cortex A9 +1

    • Cortex-A9
    • Cortex-A
    10912 views
    1 reply
    Latest over 6 years ago
    by a.surati
  • Answered

    Arm7 Lpc2148 +1

    • Arm7TDMI-S
    4559 views
    1 reply
    Latest over 6 years ago
    by Reinhard Keil Arm Employee Badge
  • Answered

    Micro controller getting reseted periodically. +1

    • Cortex-M0
    • Cortex-M
    • Interrupt
    3717 views
    2 replies
    Latest over 6 years ago
    by arjunmax@gmail.com
  • Answered

    i2c LPC1788 interface with raspberry pi3 +1

    • Raspberry Pi
    • Cortex-M3
    • Cortex-M
    4027 views
    1 reply
    Latest over 6 years ago
    by Zhifei Yang Arm Employee Badge
  • Not Answered

    Understanding of the clock cycle activity for LPC1114 0

    • Cortex-M0
    • Armv6-M
    • M-profile
    • Cortex-M
    3475 views
    1 reply
    Latest over 6 years ago
    by Vanhealsing
  • Answered

    Cortex A9 SCU Control Register Enable bit 0 or 1 for enable changed in Manual from g to h? +1

    • 32-bit
    • Cortex-A9
    • Cortex-A
    9194 views
    1 reply
    Latest over 6 years ago
    by Michal Meloun
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