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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3585 Questions
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  • Answered

    M4/M0 dual core application. M0 fails to start 0

    • Cortex-M0
    • Cortex-M
    • Cortex-M4
    4583 views
    3 replies
    Latest over 9 years ago
    by Bo Mellberg
  • Answered

    Modified harvard architecture 0

    • Arm7
    27711 views
    13 replies
    Latest over 9 years ago
    by daith
  • Not Answered

    Does ordered-memory-access wait for response? 0

    • Cortex-A17
    • Cortex-A
    3616 views
    2 replies
    Latest over 9 years ago
    by loquat
  • Answered

    How to make ARM core hung +1

    • Armv7
    5591 views
    6 replies
    Latest over 9 years ago
    by Srikanth kumar muppandam
  • Not Answered

    Why do you use Cortex-M? 0

    • 32-bit
    • Cortex-M
    21741 views
    16 replies
    Latest over 9 years ago
    by Yasuhiko Koumoto
  • Answered

    Cortex-R4: Need a explanation for dual-issue restriction 0

    • Cortex-R
    • Cortex-R4
    5079 views
    3 replies
    Latest over 9 years ago
    by Jason Lee
  • Not Answered

    what are the main differences between cortex A7, A9, A53 0

    • Cortex-A53
    • Cortex-A9
    • Cortex-A
    • Cortex-A7
    111774 views
    9 replies
    Latest over 9 years ago
    by Jens Bauer
  • Answered

    TFT RGB Problem 0

    • Cortex-M
    9927 views
    6 replies
    Latest over 9 years ago
    by Jens Bauer
  • Answered

    Armv7 ICIALLU vs ICIALLUIS +1

    • Armv7
    • Cortex-A15
    • Cortex-A
    8180 views
    2 replies
    Latest over 9 years ago
    by Paul
  • Answered

    Could you explain BCC command to me? 0

    • Armv7-M
    • Cortex-M
    44763 views
    7 replies
    Latest over 9 years ago
    by Yasuhiko Koumoto
  • Answered

    Question about bit-banding for Tiva M4 core +1

    • Cortex-M
    • Cortex-M4
    5578 views
    2 replies
    Latest over 9 years ago
    by Yasuhiko Koumoto
  • Answered

    Cortex-A9-PL310 AXI connection +1

    • Cortex-A9
    • AXI
    • Cortex-A
    5390 views
    2 replies
    Latest over 9 years ago
    by Luke
  • Answered

    Event counters take differing number of cycles +1

    • Cortex-A
    • Cortex-A8
    5737 views
    2 replies
    Latest over 9 years ago
    by dan sullivan
  • Answered

    How to bring secondary CPU1 on ARM v7 0

    • Armv7
    • Cortex-A
    9645 views
    6 replies
    Latest over 9 years ago
    by Peter Harris Arm Employee Badge
  • Answered

    Cortex M3 - Literal-pool vs MOVW-MOVT when cache is present 0

    • Cortex-M3
    • Cache
    • Cortex-M
    14183 views
    9 replies
    Latest over 9 years ago
    by Remi DUCLOS
  • Answered

    Aarch32 app performance on ARMv8a device +1

    • Cortex-A57
    • Armv8
    • Cortex-A
    9612 views
    3 replies
    Latest over 9 years ago
    by Sreenath P V
  • Answered

    LPC1768 - Network-on-Chip 0

    • Cortex-M
    7016 views
    6 replies
    Latest over 9 years ago
    by Jens Bauer
  • Not Answered

    AMBA AHB SLAVE MULTIPLE SPLIT RESPONSES TO SINGLE MASTER 0

    • AMBA
    • AHB
    9008 views
    6 replies
    Latest over 9 years ago
    by Colin Campbell Arm Employee Badge
  • Answered

    Clean Whole Cache on Cortex-A9 0

    • Cortex-A9
    • Cache
    • Cortex-A
    12263 views
    8 replies
    Latest over 9 years ago
    by John
  • Answered

    How to put codes into ITCM? 0

    • Cortex-M7
    • Cortex-M
    8030 views
    1 reply
    Latest over 10 years ago
    by Yasuhiko Koumoto
<>
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