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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3582 Questions
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  • Not Answered

    Does ARMv8-A has VC_CORERESET or something similar? 0

    • Cortex-A53
    16607 views
    1 reply
    Latest over 5 years ago
    by Michael Williams Arm Employee Badge
  • Not Answered

    3 phase sine wave using stm32f030r8t6 MCU 0

    3345 views
    2 replies
    Latest over 5 years ago
    by Oliver Beirne Arm Employee Badge
  • Not Answered

    Where are the DSP prebuild libraries? 0

    • Digital Signal Processor (DSP)
    • STM32
    • Library
    • CMSIS
    1987 views
    0 replies
    Started over 5 years ago
    by eMKa
  • Not Answered

    MMU table management during CPU mode switch 0

    12810 views
    6 replies
    Latest over 5 years ago
    by flongnos
  • Not Answered

    L2 cache error injection for instructions and Prefetch Abort 0

    18998 views
    1 reply
    Latest over 5 years ago
    by flongnos
  • Answered

    Why is MDR (I2C Master Core) register is not updating ??? 0

    3131 views
    2 replies
    Latest over 5 years ago
    by omkardixi
  • Not Answered

    SVCall returning to 0xdeadbeee 0

    • Cortex-M7
    • 11 (SVCall)
    7949 views
    6 replies
    Latest over 5 years ago
    by DanS
  • Answered

    setting breakpoint from code +2

    • Cortex-M3
    • Cortex-M
    13070 views
    10 replies
    Latest over 5 years ago
    by Joseph Yiu Arm Employee Badge
  • Not Answered

    Unable to store my result back to the memory 0

    1237 views
    0 replies
    Started over 5 years ago
    by KushalSriv
  • Not Answered

    Cortex M0 (stm32l010) placing interrupt vector in ram for application starting from a proprietary bootloader 0

    • Cortex-M0
    • Interrupt Handling
    • 15 (SysTick)
    2185 views
    0 replies
    Started over 5 years ago
    by Andrea G. CoopBil
  • Not Answered

    What will be the reason for MDR register not getting updated?? 0

    • Cortex-M
    • Arm Support
    1874 views
    0 replies
    Started over 5 years ago
    by omkardixi
  • Answered

    gicv3 aarch32 icc_hsre +1

    44601 views
    15 replies
    Latest over 5 years ago
    by PJ Nee
  • Not Answered

    Invalidate queue 0

    11362 views
    1 reply
    Latest over 5 years ago
    by 42Bastian Schick
  • Answered

    Can I program M95640WP using CH341A Programmer +1

    2305 views
    1 reply
    Latest over 5 years ago
    by Oliver Beirne Arm Employee Badge
  • Not Answered

    AXI 4 Write Data Interleaving 0

    11950 views
    1 reply
    Latest over 5 years ago
    by Colin Campbell Arm Employee Badge
  • Answered

    Process ADC data, moved by DMA, using CMSIS DSP: what's the right way? 0

    • Cortex-M
    • CMSIS
    • Cortex-M4
    108036 views
    44 replies
    Latest over 5 years ago
    by KyleZ
  • Not Answered

    GCC 9 stack protector comparing address of stack guard not value 0

    3184 views
    1 reply
    Latest over 5 years ago
    by 42Bastian Schick
  • Not Answered

    Booting of cortex M7 core, independently of cortex A53 core 0

    • Real Time Operating Systems (RTOS)
    • Cortex-A53
    • System on Chip (SoC)
    • Cortex-M7
    • operating systems
    2946 views
    1 reply
    Latest over 5 years ago
    by 42Bastian Schick
  • Not Answered

    INSTRUCTION SET OF CORTEX M55? 0

    1531 views
    0 replies
    Started over 5 years ago
    by Sony
  • Not Answered

    STLink Utility Target Address 0

    1637 views
    0 replies
    Started over 5 years ago
    by JRMN
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