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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3631 Questions
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  • Not Answered

    How stable is C/C++ structure padding under the AAPCS (ARM ABI)? 0

    2452 views
    0 replies
    Started over 5 years ago
    by Alain Mosnier
  • Answered

    How to start ARM Programming??? 0

    • Raspberry Pi
    • Cortex-A
    • Cortex-A8
    • Cortex-M
    138876 views
    6 replies
    Latest over 5 years ago
    by Sam Jewel
  • Not Answered

    Cortex M33 Tracing 0

    • CoreSight SoC-400
    • Cortex-M33
    • Armv8-M
    • CoreSight Micro Trace Buffer for the Cortex-M33
    • CoreSight Embedded Trace Macrocell for Cortex-M33
    5461 views
    6 replies
    Latest over 5 years ago
    by Lica
  • Answered

    how to utilize interrupts in arm9 processors..? what is residing inside ISR..? +1

    • Arm9
    13197 views
    6 replies
    Latest over 5 years ago
    by Susheel Jalali Digital Architect
  • Not Answered

    Basic Flash Programming and the process in integrating Cortex M0 0

    • Cortex-M0
    • PL351 NAND Flash Memory Controller
    • PL353 SRAM NOR/NAND Flash Memory Controller
    • Debugging
    3087 views
    0 replies
    Started over 5 years ago
    by Mezan1
  • Not Answered

    how to debug synchronous exception inside QEMU session 0

    15642 views
    0 replies
    Started over 5 years ago
    by qqq
  • Not Answered

    GSM driver in Arm Cortex-M4F 0

    • Power Management Kits
    • gsm
    • Cortex-M4
    2012 views
    0 replies
    Started over 5 years ago
    by vinoth
  • Answered

    armv8-m mpu: how to mark one region with no any access? 0

    • Armv8-M
    4561 views
    3 replies
    Latest over 5 years ago
    by Uma Ramalingam Arm Employee Badge
  • Answered

    [Cortex-A53] Exception Syndrome Register - Exception Class 0

    • Cortex-A53
    18717 views
    2 replies
    Latest over 5 years ago
    by krjdev
  • Answered

    floating point performance benchmark 0

    25761 views
    5 replies
    Latest over 5 years ago
    by bobford
  • Not Answered

    Global variable initialisation problem 0

    • Cortex-M3
    1852 views
    0 replies
    Started over 5 years ago
    by Maitland
  • Not Answered

    Cortex-M3 Registers 0

    2948 views
    4 replies
    Latest over 5 years ago
    by Andy Neil
  • Not Answered

    Speculative data fetching on ARMv7-M 0

    • Armv7-M
    • Cache
    4992 views
    2 replies
    Latest over 5 years ago
    by MikeRobo
  • Not Answered

    Cortex-M3 Registers 0

    7018 views
    10 replies
    Latest over 5 years ago
    by Fabiano Junqueira
  • Answered

    FPB BreakPoint(without Debugger) 0

    • Armv7-M
    • Debugging
    • Cortex-M4
    5052 views
    3 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Answered

    Make MPU be uniprocessor system 0

    17233 views
    3 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Answered

    Trouble configuring MMU for 2MB block mapping 0

    • Memory Management Unit (MMU)
    18417 views
    1 reply
    Latest over 5 years ago
    by jcal93
  • Not Answered

    How to write to DHCSR register in Cortex-M 0

    • CoreSight Debug and Trace
    • 12 (Debug Monitor)
    • Cortex-M
    4883 views
    2 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Answered

    System wide cache flush 0

    • Cortex-A35
    • Cache coherency
    • Armv8-A
    • Cache Management
    21841 views
    5 replies
    Latest over 5 years ago
    by Norbert Goldstein
  • Not Answered

    Exec latency for ASIMD instructions taking the V pipelines 0

    18496 views
    2 replies
    Latest over 5 years ago
    by sjub
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