A9 MP, IAR tool set, jLink probe, using 2 cores. I'm having an issue I didn't expect. Both core 0 and core 1 boot with the same startup code although the two cores code set is in different locations. Core 0 starts at 0x10000000, and core 2 starts at 0x10300000. Both run the same RTOS. I depend on the ARM CP 15 affinity register to let the RTOS know which core it's running on. This is the beginning of the startup code:
__boot
// Setup temporary vector table b reset b . // undefined b . // svc b . // prefetch b . // abort b . // reserved vector b . // irq b . // fiq
reset // write the address of the vector table into the VBAR reg ldr r0, =__boot mcr p15, 0, r0, c12, c0, 0 //write VBAR register // Get core ID and save it in r5 mrc p15,0,r2,c0,c0,5 // read multiprocessor affinity register and r2, r2, #3 // mask off, leaving CPU ID field mov r5, r2 // save core ID for later
You can see at the bottom of this code I read the affinity register into r2. The issue is that it always reads 0x80000000 for both core 0 and core 1. What am I doing wrong? The debugger shows that when i'm excuting core 0 code the PC is in the 0x1000ish range, and the core 1 code is executing in the 0x1030ish range. That tells me that the core 1 code is not being executed by core 0.
Yes, I check r2. I don't know of any other way to check as this is what the code sees. The core 1 code runs, however it thinks it is core 0 and initializes the mmu, caches, etc. which are already initialized by core 0. I'm new to the A9, so I'm not sure how to properly get the secondary cores started. I'm trying to use NXP's iMX6DQ SDK code. Picking on core 1, with this processor it appears that one writes the starting address of the secondary code into SRC_GPR3. SRC_GPR4 is available to hold a startup parameter. I then start the core by setting the core 1 enable bit in SRC_SCR. The code does indeed start, but with the wrong core. I wonder if I'm using the wrong approach. I've read that when a secondary core starts, it does a WFI. The SDK code does in fact use an SGI. I'm trying that next.