Hello, experts:
My platform is a Cortex-A9 MPCore CPU, Sabre Lite(i.mx6).
I tried to count TLB miss so I implemented PMUEVENT to check micro TLB miss.
But PMUEVENT doesn't support the main TLB miss event.
In cortex-a9 RFP, "If there is a miss in main TLB, performs a hardware translation table walk.".
1. Can I count main TLB miss in OS level?
2. Any other way to count main TLB miss with merging PMUEVENT?
Thanks!