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Forums

  • Servers and Cloud Computing forum

    The latest forum discussions about the Arm Servers and Cloud Computing ecosystem for cloud native edit to cloud application development and deployment.
    101 questions
    romain beurdouche
    RE: ArmRAL: Wrong usage of k0 in LDPC rate matching 8 months ago
  • SoC Design and Simulation forum

    The latest forum discussions for community-based support for System-on-Chip (SoC) and Arm simulation models.
    713 questions
    Colin Campbell
    RE: AHB: Address and control signal stable during waited write access 10 days ago Arm Employee Badge
  • SystemReady Forum

    The SystemReady forum covers all aspects of the Arm SystemReady compliance program, including associated specifications (BSA, SBSA, BBR), Architecture Compliance Suite (ACS) testing, and implementation considerations for pre-silicon and SystemReady bands.
    15 questions
    vstehle
    RE: How to run ARM ACS 7 months ago Arm Employee Badge
  • TOSA forum

    Tensor Operator Set Architecture (TOSA) provides a set of whole-tensor operations commonly employed by Deep Neural Networks.
    1 question
    Oliver Beirne
    RE: Forum FAQs 2 months ago Arm Employee Badge
  • 恩智浦汽车电子MCU讨论区博

    4 questions
    Song Bin 宋斌
    RE: [TRK-KEA64使用经验分享] 开箱体验 亮瞎我的双眼 over 10 years ago Arm Employee Badge
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All questions in this Community
  • Not Answered

    Linux to MHU communication in Multi chiplet SOC 0

    365 views
    0 replies
    Started 6 months ago
    by chandrashekar
  • Answered

    Can Cross Trigger Configure Multiple Cores to Halt Simultaneously in Self-Hosted Debug? +1

    • ds-5
    • Debugging
    791 views
    1 reply
    Latest 6 months ago
    by Stephen Theobald Arm Employee Badge
  • Suggested Answer

    Can Cross Trigger Configure Multiple Cores to Halt Simultaneously in Self-Hosted Debug? 0

    • Armv8-A
    666 views
    1 reply
    Latest 6 months ago
    by Stephen Theobald Arm Employee Badge
  • Suggested Answer

    Hardfault in fmount() using Keil MDK with CMSIS-RTOS2 0

    • Keil MDK
    • RTX5
    • CMSIS RTOS
    1174 views
    3 replies
    Latest 6 months ago
    by rkopsch Arm Employee Badge
  • Not Answered

    GIC-700 SPI routing in multichip system 0

    • Multichip
    • GICv3/v4
    • Interrupt
    • spi
    343 views
    0 replies
    Started 6 months ago
    by RH Kim
  • Not Answered

    STM32H5 - Debug Trace ETM 0

    • STM32H5
    • ETM
    • Trace
    • CubeMX
    • uVision
    399 views
    0 replies
    Started 6 months ago
    by TRESA - Daniel Liquete Garcia
  • Answered

    Need to measure cycle count using DWT +1

    929 views
    2 replies
    Latest 6 months ago
    by tobermory
  • Not Answered

    GPU Hierarchy 2025 – Ultimate Graphics Card Benchmarks & Comparison 0

    • GPU Benchmark
    12703 views
    1 reply
    Latest 6 months ago
    by josaf bodia
  • Suggested Answer

    random processing of working group in OpenCL 0

    • OpenCL
    • Mali-GPU
    2114 views
    6 replies
    Latest 6 months ago
    by hterrolle
  • Not Answered

    ARM Linker Call Graph Missing Object File Reference - Keil 0

    348 views
    0 replies
    Started 6 months ago
    by Nhut Ho
  • Answered

    RenderDoc is not working with Android in Performance Studio 2025.2 (macOS build) 0

    • RenderDoc
    1500 views
    3 replies
    Latest 6 months ago
    by Cam Mannett Arm Employee Badge
  • Not Answered

    Problem when using the ULINK2 debugger 0

    446 views
    0 replies
    Started 6 months ago
    by Thomas Ambrogini
  • Not Answered

    Tool to identify the the effect of compiler optimization 0

    736 views
    0 replies
    Started 6 months ago
    by jack kiee
  • Not Answered

    Unable to Read/Write Non-Secure EL1 System Registers (e.g., SCTLR_EL1) from EL3 on FVP with OP-TEE and TF-A 0

    • Arm Trusted Firmware
    • Interrupt Handling
    • EL3
    • Armv8-A
    • Trusted Firmware-A
    • TrustZone
    • fvp
    • Linux
    455 views
    0 replies
    Started 6 months ago
    by Dev Gandhi
  • Suggested Answer

    Executing a CPP RCTX instruction 0

    • errata
    • Armv8-A
    • Trusted Execution Environment (TEE)
    • TrustZone
    • Arm Assembly Language (ASM)
    837 views
    1 reply
    Latest 6 months ago
    by josaf bodia
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