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Forums

  • Operating Systems forum

    The latest forum discussions for all Arm technology relating to Operating Systems (OS)
    272 questions
    Cantaff0rd
    UEFI variables from UEFI shell 2 months ago
  • Servers and Cloud Computing forum

    The latest forum discussions about the Arm Servers and Cloud Computing ecosystem for cloud native edit to cloud application development and deployment.
    101 questions
    romain beurdouche
    RE: ArmRAL: Wrong usage of k0 in LDPC rate matching 5 months ago
  • SoC Design and Simulation forum

    The latest forum discussions for community-based support for System-on-Chip (SoC) and Arm simulation models.
    707 questions
    Firoz M L
    In CHI how the Slave side is giving the L-Credits to the Master Side 1 day ago
  • SystemReady Forum

    The SystemReady forum covers all aspects of the Arm SystemReady compliance program, including associated specifications (BSA, SBSA, BBR), Architecture Compliance Suite (ACS) testing, and implementation considerations for pre-silicon and SystemReady bands.
    15 questions
    vstehle
    RE: How to run ARM ACS 4 months ago Arm Employee Badge
  • 恩智浦汽车电子MCU讨论区博

    4 questions
    Song Bin 宋斌
    RE: [TRK-KEA64使用经验分享] 开箱体验 亮瞎我的双眼 over 9 years ago Arm Employee Badge
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All questions in this Community
  • Answered

    The BUSY state of HTRANS, compared AHB 2.0 with AHB 5.0 0

    • AMBA
    • AMBA 2
    • AMBA 5
    • AHB
    2091 views
    2 replies
    Latest over 1 year ago
    by E K
  • Answered

    Sprintf hardfaulting with float input 0

    • GNU Toolchain
    • C
    • Cortex-M4
    • Baremetal
    1796 views
    2 replies
    Latest over 1 year ago
    by Sam B
  • Answered

    Variable in NOINIT section 0

    • uVision
    • Cortex-M0+
    • compilation
    1455 views
    2 replies
    Latest over 1 year ago
    by Eric Wiebols
  • Not Answered

    System Register (S3_3_C2_C4_0) Compilation Error 0

    • EDK2
    • @UEFI
    • @ArmCompiler
    • @ArmRegister
    629 views
    0 replies
    Started over 1 year ago
    by OH YOUGON
  • Not Answered

    Trusted Firmware A 0

    1119 views
    0 replies
    Started over 1 year ago
    by Bharath Kumar
  • Suggested Answer

    Enable PIE/POE Cause Linux fail to boot 0

    • Fixed Virtual Platforms (FVPs)
    1587 views
    1 reply
    Latest over 1 year ago
    by Zhifei Yang Arm Employee Badge
  • Answered

    Unaligned access failed when SCTLR.A is 0 on Cortex-A53 0

    • Cortex-A53
    • Registers
    • AArch32
    1896 views
    1 reply
    Latest over 1 year ago
    by Ynho
  • Answered

    Network library settings 0

    • network
    • rtos
    • STM32
    2888 views
    9 replies
    Latest over 1 year ago
    by Volter_1122
  • Answered

    Sending massive packets to a closed UDP client 0

    • Keil MDK
    • network
    • stm32f1
    • CMSIS RTOS
    1057 views
    2 replies
    Latest over 1 year ago
    by Franc Urbanc Arm Employee Badge
  • Answered

    RLAST specification check for ACE two-part DVM transaction 0

    • ACE
    • ACE 5
    • DVM transaction
    • AMBA 5
    1392 views
    1 reply
    Latest over 1 year ago
    by Christopher Tory Arm Employee Badge
  • Suggested Answer

    Does Cortex-A53 put stack in L1 data cache when the region is marked as uncacheable? ? 0

    2814 views
    5 replies
    Latest over 1 year ago
    by Zhifei Yang Arm Employee Badge
  • Answered

    SC000 Anti-tampering feature +1

    • Armv6-M
    • SC000 Processor
    1282 views
    1 reply
    Latest over 1 year ago
    by Zhifei Yang Arm Employee Badge
  • Answered

    Typical instruction per cycle in A53 CPU. 0

    • Cortex-A53
    2396 views
    2 replies
    Latest over 1 year ago
    by User_0182
  • Answered

    CA72 can't access ICC_IAR1_EL1 at EL1 0

    • AArch64
    • GICv3/v4
    • gic500
    • Interrupt
    • ca72
    3129 views
    8 replies
    Latest over 1 year ago
    by Kael Hong
  • Answered

    AXI read burst request and response 0

    9273 views
    21 replies
    Latest over 1 year ago
    by Khach
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