I am a begginer to arm and I have a problem with understanding Data Abort that I get when reading from memory (ATCM)
when I read from atcm. next pc jumps to 0x10, so Its Data Abort.
However, If I write to the same address. then I can read from it without data abort.
I disabled MPU using code from Cortex R TRM.
Now I do not know the reason of this behaviour.
1. I thought this was platform-related , but as It's TCM, and SOC TRM referred to Cortex R TRM, I started looking for a clue in cortex R - related resources. (please forgive me if it appears to be not cortex-r-related)
2. I am missing knowledge about what can cause this error, especially, that the memory is finally accessible (after write) and that I disabled the MPU.
I am using one core of Cortex R5, in split mode. ATCM is 64KB, and example address that caouses this is 0x2a08 (As far as I know, Its in proper range, ATCM starts in 0x0)
There are many more addresses where I get the same result, but most of them are ok. (I think the ones ending with 8 make this problem)
The address is used for stack, pop instruction is used to get data from the address to r0, but I think this should not matter (?)
Please help me find a reason of this behaviour.
Cortex R5 profile has a Data fault status register and Auxiliary data fault status register (refer section 4.2 from ARM DDI 0460D). Dump them in the your D-abort handler to get more information about the Data abort that you are seeing. Also, Is ECC check enabled on ATCM ? if yes, then are you also initializing it by pre-loading the TCM (refer preloading TCMs section from ARM DDI 0460D) ? Because, ECC check is done on the read operation and are ECC calculation is done on the write operation. A read operation from ECC protected TCM with an uninitialized ECC code will always give you Data abort unless you have ECC correction enabled and also If it's a non-fatal ecc error.