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Endian in Cortex-M4

Hello to all,

I am working on ARM Cortex-M4. Since it has 32-bit address bus, therefore I assumed that each 32-bit instruction will be allocated a physical address location in the Flash. But while reading the disassembly of the code, I got to know that each instruction address needs 4 address location.

Why is it so? Is it because each memory address location is for each byte? also in which sequential order (Endian) the Bytes are arranged (Default) in ARM Cortex-M4? AND also How and where do I change the Endian in Cortex-M4 (Register name and the bit value)?

Thanking you,

Regards,

Himanshu

  • First of all, since Cortex M4 uses Thumb and Thumb2 instructions, many mof them are only 16bits long.

    Memory is byte addressable largely to support data types smaller than 32bits.  There hasn't been a general purpose CPU architecture developed in a long time that doesn't have byte-addressable data memory.  Since ARM shares the address space between data and instructions, instruction memory is also byte addressable.

    Cortex-M cpus can be little-endian or big-endian, but it can't switch between endianess without at least a chip RESET (pick one during board-level design) or possibly a chip re-design (pick when creating the chip.)  I've never seem anything by little-endian-only chips in the marketplace.
    See Section A3.3 "Control of endianness in ARMv7-M" in the ARMv7-M Architecture Reference Manual