CortexM0 Debug - DAP baseaddr, M0 ROM Table and system ROM table

Hi all,

Would like to get some clarifications regarding the items above. I'm working on the CMSDK kit for the Cortex M0 and the example system has a Cortex M0, a system ROM table and DAP instantiated.

The DAP by default has the baseaddr tied to E00F_F003 which points to the base internal Cortex M0 ROM table at 0xE00FF000.

The example system ROM table is defined at address 0xF000_0000 with the defines below

cmsdk_ahb_cs_rom_table
#(.BASE (32'hF000_0000),
// Entry 0 = Cortex-M0+ Processor
.ENTRY0BASEADDR (32'hE00FF000),
.ENTRY0PRESENT (1'b1),
...........

Questions 

1. What is the purpose of the system ROM table, in this case it points again to the Cortex M0 ROM table?

2. Should the DAP baseaddr be pointing to system ROM table base instead --- 0xF000_0000? Having the DAP pointing directly to the M0 ROM table seems to render the system ROM table unused.

3. What is the actual access sequence of the ROM tables -- system then M0 ?

Thanks in advance.

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