I have tryed to make SWD connect to Cortex-M0 DesignStart Eval by STLink2, but it was unsuccessful.
The SW Device showed information as this picture.
I chose AHB_ROM_FPGA_SRAM_MODEL and AHB_RAM_FPGA_SRAM_MODEL be the MYM_TYPE
thanks for your suggestion.
I'll check my setting by your suggestion.
Good luck!