I am experimenting execution level switching on A53. I go from EL3->El2, then call SMC instruction to return to EL3. As soon as SMC instruction is executed, the processor enters EL3 mode and an exception is generated.
I have written an exception handler to return from this question. My question is should I use an ERET at the end of the exception handler? In that case will it go back to EL2 or will remain in EL3(since the exception was generated in EL2)? I would like for the processor to remain in EL3. SHould I manually modify the ELR so that the processor remains in EL3. I want to know how it is normally done.
The SMC instruction is used to generate a synchronous exception that is handled by Secure Monitor code running in EL3 Upsers.
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